DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 519

• Manufacturer Part Number: DF2117VT20V
• Description: MCU 16BIT FLASH 3V 160K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VT20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

16.3.5
BRR is an 8-bit register that adjusts the sampling clock signal used for CIR reception. The bit rate
for the CIR reception is determined by a combination of the setting value in BRR and the CLK1
and CLK0 bits in CCR1.
The following formula is used for calculating the bit rate, and the following table shows BRR
setting examples to obtain a target bit rate.
B: Bit rate (bits/s)
T: Frequency of the reference clock (Hz) set by the CLK1 and CLK0 bits in CCR1 (φ, φ/2, φ/4, or
N: Set value in BRR (0 ≤ N ≤ 255)
Table 16.3 Setting Example of BRR
Bit
7 to 0
Carrier
Frequency
38kHz
φsub)
B = T / (N + 1)
Bit Rate Register (BRR)
Bit Name
BRR7 to
BRR1
φ
20 MHz
10 MHz
8 MHz
⎯
Initial
Value
All 1
CLK1 and
CLK0 Setting
φ
φ/2
φ/4
φ
φ/2
φ/4
φ
φ/2
φ/4
φsub
R/W
R/W
Description
Sets the value of the sampling clock.
BRR Setting
Value
H'FF
H'FF
H'83
H'FF
H'83
H'41
H'D2
H'69
H'34
H'00
Rev. 2.00 Sep. 28, 2009 Page 477 of 994
Bit Rate
(Kbit/s)
78.1
39.1
37.9
39.1
37.9
37.9
37.9
37.7
37.7
32.8
Deviation from
Target Carrier
Frequency
51.36%
2.72%
−0.32%
2.72%
−0.32%
−0.32%
−0.23%
−0.70%
−0.70%
2.34%
REJ09B0452-0200