DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 908

• Manufacturer Part Number: DF2117VT20V
• Description: MCU 16BIT FLASH 3V 160K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VT20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Register Name
PWM prescaler register 5_A
PWM control register A_A
PWM control register B_A
PWM control register C_A
PWM control register D_A
PWM duty setting register 0_B
PWM prescaler register 0_B
PWM duty setting register 1_B
PWM prescaler register 1_B
PWM duty setting register 2_B
PWM prescaler register 2_B
PWM duty setting register 3_B
PWM prescaler register 3_B
PWM duty setting register 4_B
PWM prescaler register 4_B
PWM duty setting register 5_B
PWM prescaler register 5_B
PWM control register A_B
PWM control register B_B
PWM control register C_B
PWM control register D_B
Timer control register_1
Timer mode register_1
Timer I/O control register_1
Timer interrupt enable register_1
Timer status register_1
Timer counter _1
Timer general register A_1
Timer general register B_1
LPC channel 1 address register H
LPC channel 1 address register L
LPC channel 2 address register H
LPC channel 2 address register L
Rev. 2.00 Sep. 28, 2009 Page 866 of 994
REJ09B0452-0200
Abbreviation
PWMPRE5_A 8
PWMCONA_A 8
PWMCONB_A 8
PWMCONC_A 8
PWMCOND_A 8
PWMREG0_B 8
PWMPRE0_B 8
PWMREG1_B 8
PWMPRE1_B 8
PWMREG2_B 8
PWMPRE2_B 8
PWMREG3_B 8
PWMPRE3_B 8
PWMREG4_B 8
PWMPRE4_B 8
PWMREG5_B 8
PWMPRE5_B 8
PWMCONA_B 8
PWMCONB_B 8
PWMCONC_B 8
PWMCOND_B 8
TCR_1
TMDR_1
TIOR_1
TIER_1
TSR_1
TCNT_1
TGRA_1
TGRB_1
LADR1H
LADR1L
LADR2H
LADR2L
Number
of bits
8
8
8
8
8
16
16
16
8
8
8
8
Address
H'FD0C
H'FD0D
H'FD10
H'FD12
H'FD14
H'FD16
H'FD18
H'FD1A
H'FD1C
H'FD1D
H'FD46
H'FD48
H'FD4A
H'FDC0
H'FDC2
H'FD0B
H'FD0E
H'FD0F
H'FD11
H'FD13
H'FD15
H'FD17
H'FD19
H'FD1B
H'FD1E
H'FD1F
H'FD40
H'FD41
H'FD42
H'FD44
H'FD45
H'FDC1
H'FDC3
PWMU_A 8
PWMU_B 8
PWMU_B 8
PWMU_B 8
PWMU_B 8
PWMU_B 8
PWMU_B 8
PWMU_B 8
TPU_1
Module
PWMU_A 8
PWMU_A 8
PWMU_A 8
PWMU_A 8
PWMU_B 8
PWMU_B 8
PWMU_B 8
PWMU_B 8
PWMU_B 8
PWMU_B 8
PWMU_B 8
PWMU_B 8
PWMU_B 8
TPU_1
TPU_1
TPU_1
TPU_1
TPU_1
TPU_1
TPU_1
LPC
LPC
LPC
LPC
Data
Width
8
16
16
16
8
8
8
8
8
8
8
8
Access
States
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2