DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 821
DF2117VT20V
Manufacturer Part Number
DF2117VT20V
Description
MCU 16BIT FLASH 3V 160K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.DF2117VT20HV.pdf
(1040 pages)
Specifications of DF2117VT20V
Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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1. After boot mode is initiated, the bit rate of the SCI_1 is adjusted with that of the host.
2. Inquiry information about the size, configuration, start address, and support status of the user
3. After inquiries have finished, all user MAT and user boot MAT are automatically erased.
4. When the program preparation notice is received, the state of waiting for program data is
Memory read of the user MAT and user boot MAT can only read the data programmed after all
user MAT and user boot MAT have automatically been erased. No other data can be read.
MAT is transmitted to the host.
entered. The start address of the programming destination and program data must be
transmitted after the programming command is transmitted. When programming is finished,
the start address of the programming destination must be set to H'FFFFFFFF and transmitted.
Then the state of waiting for program data is returned to the state of waiting for
programming/erasing command. When reprogramming an erase block including an area on
which the programming end command is issued, erase the erase block. An example of the
erase block is shown in figure 24.9. When the erasure preparation notice is received, the state
of waiting for erase block data is entered. The erase block number must be transmitted after the
erasing command is transmitted. When the erasure is finished, the erase block number must be
set to H'FF and transmitted. Then the state of waiting for erase block data is returned to the
state of waiting for programming/erasing command. Erasure must be executed when the
specified block is programmed without a reset start after programming is executed in boot
mode. When programming can be executed by only one operation, all blocks are erased before
entering the state of waiting for programming/erasing command or another command. Thus, in
this case, the erasing operation is not required. The commands other than the
programming/erasing command perform sum check, blank check (erasure check), and memory
read of the user MAT and user boot MAT, and acquisition of current status information.
Figure 24.9 Example of Erase Block Including Programmed Area
Programming
end area
EB5
EB6
EB7
EB8
Before reprogramming erase blocks EB6 and
EB7 on which the programming end command
is issued, erase the blocks (EB6 and EB7).
Rev. 2.00 Sep. 28, 2009 Page 779 of 994
REJ09B0452-0200
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