DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 668

• Manufacturer Part Number: DF2117VT20V
• Description: MCU 16BIT FLASH 3V 160K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VT20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

20.3.2
HICR2 controls interrupts to an LPC interface slave (this LSI). HICR3 and the bit 7 in HICR2
monitor the states of the LPC interface pins. Bits 6 to 0 in HICR2 are initialized to H'00 by a reset.
The states of other bits are decided by the pin states. The pin states can be monitored by the pin
monitoring bits regardless of the LPC interface operating state or the operating state of the
functions that use pin multiplexing.
• HICR2
Rev. 2.00 Sep. 28, 2009 Page 626 of 994
REJ09B0452-0200
Bit
7
6
5
Bit Name
GA20
LRST
SDWN
Host Interface Control Registers 2 and 3 (HICR2 and HICR3)
Initial
Value
Undefined R
0
0
Slave Host Description
R/(W)* ⎯
R/(W)* ⎯
R/W
⎯
GA20 Pin Monitor
LPC Reset Interrupt Flag
This bit is a flag that generates an ERRI interrupt
when an LPC hardware reset occurs.
0: [Clearing condition]
Writing 0 after reading LRST = 1
1: [Setting condition]
LRESET pin falling edge detection
LPC Shutdown Interrupt Flag
This bit is a flag that generates an ERRI interrupt
when an LPC hardware shutdown request is
generated.
0: [Clearing conditions]
•
•
•
1: [Setting condition]
LPCPD pin falling edge detection
Writing 0 after reading SDWN = 1
LPC hardware reset
(LRESET pin falling edge detection)
LPC software reset (LRSTB = 1)