DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 718

MCU 16BIT FLASH 3V 160K 144-TQFP

DF2117VT20V

Manufacturer Part Number
DF2117VT20V
Description
MCU 16BIT FLASH 3V 160K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VT20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Price
Part Number:
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DF2117VT20V
Manufacturer:
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Quantity:
10 000
Table 20.10 HIRQ Setting and Clearing Conditions when LPC Channels are Used
Rev. 2.00 Sep. 28, 2009 Page 676 of 994
REJ09B0452-0200
Host Interrupt
HIRQ1
HIRQ12
SMI
(IEDIR2 = 0,
IEDIR3 = 0, or
IEDIR4 = 0)
SMI
(IEDIR2 = 1,
IEDIR3 = 1, or
IEDIR4 = 1)
HIRQi
(i = 6, 9, 10, 11)
(IEDIR2 = 0,
IEDIR3 = 0, or
IEDIR4 = 0)
HIRQi
(i = 6, 9, 10, 11)
(IEDIR2 = 1,
IEDIR3 = 1, or
IEDIR4 = 1)
Setting Condition
Internal CPU writes to ODR1, then reads 0
from bit IRQ1E1 and writes 1
Internal CPU writes to ODR1, then reads 0
from bit IRQ12E1 and writes 1
Internal CPU
Internal CPU
Internal CPU
Internal CPU
writes to ODR2, then reads 0 from bit
SMIE2 and writes 1
writes to ODR3, then reads 0 from bit
SMIE3A and writes 1
writes to TWR15, then reads 0 from bit
SMIE3B and writes 1
writes to ODR4, then reads 0 from bit
SMIE4 and writes 1
reads 0 from bit SMIE2, then writes 1
reads 0 from bit SMIE3A, then writes 1
reads 0 from bit SMIE3B, then writes 1
reads 0 from bit SMIE4, then writes 1
writes to ODR2, then reads 0 from bit
IRQiE2 and writes 1
writes to ODR3, then reads 0 from bit
IRQiE3 and writes 1
writes to ODR4, then reads 0 from bit
IRQiE4 and writes 1
reads 0 from bit IRQiE2, then writes 1
reads 0 from bit IRQiE3, then writes 1
reads 0 from bit IRQiE4, then writes 1
Clearing Condition
Internal CPU writes 0 to bit IRQ1E1,
or host reads ODR1
Internal CPU writes 0 to bit
IRQ12E1, or host reads ODR1
Internal CPU
Internal CPU
Internal CPU
Internal CPU
writes 0 to bit SMIE2, or host
reads ODR2
writes 0 to bit SMIE3A, or host
reads ODR3
writes 0 to bit SMIE3B, or host
reads TWR15
writes 0 to bit SMIE4, or host
reads ODR4
writes 0 to bit SMIE2
writes 0 to bit SMIE3A
writes 0 to bit SMIE3B
writes 0 to bit SMIE4
writes 0 to bit IRQiE2, or host
reads ODR2
CPU writes 0 to bit IRQiE3, or
host reads ODR3
CPU writes 0 to bit IRQiE4, or
host reads ODR4
writes 0 to bit IRQiE2
writes 0 to bit IRQiE3
writes 0 to bit IRQiE4

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