DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 594

• Manufacturer Part Number: DF2117VT20V
• Description: MCU 16BIT FLASH 3V 160K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VT20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 18 I
Rev. 2.00 Sep. 28, 2009 Page 552 of 994
REJ09B0452-0200
Bit
4
3
AASX
Bit Name
AL
2
C Bus Interface (IIC)
Initial
Value
0
0
R/W
R/(W)* Second Slave Address Recognition Flag
R/(W)* Arbitration Lost Flag
Description
In I
1 if the first frame following a start condition matches
bits SVAX6 to SVAX0 in SARX.
[Setting condition]
When the second slave address is detected in slave
receive mode and FSX = 0 in SARX
[Clearing conditions]
•
•
•
Indicates that arbitration was lost in master mode.
[Setting conditions]
When ALSL=0
•
•
When ALSL=1
•
•
[Clearing conditions]
•
•
2
When 0 is written in AASX after reading AASX = 1
When a start condition is detected
In master mode
If the internal SDA and SDA pin disagree at the rise
of SCL in master transmit mode
If the internal SCL line is high at the fall of SCL in
master mode
If the internal SDA and SDA pin disagree at the rise
of SCL in master transmit mode
If the SDA pin is driven low by another device
before the I
after the start condition instruction was executed in
master transmit mode
When ICDR is written to (transmit mode) or read
from (receive mode)
When 0 is written in AL after reading AL = 1
C bus format slave receive mode, this flag is set to
2
C bus interface drives the SDA pin low,