DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 560

• Manufacturer Part Number: DF2117VT20V
• Description: MCU 16BIT FLASH 3V 160K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VT20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(3)
Figure 17.5 shows an example of the data reception flowchart.
Rev. 2.00 Sep. 28, 2009 Page 518 of 994
REJ09B0452-0200
Serial Data Reception
No
No
No
(End of reception or reception standby)
Read DR flag in FLSR
PE = 1, or OE = 1
RXFIFOERR = 1,
Start reception
BI = 1, FE = 1,
Figure 17.5 Example of Data Reception Flowchart
All data read
Read FRBR
Initialization
Read FLSR
Read FLSR
DR = 1
DR = 0
Yes
Yes
No
Yes
Error processing
Yes
[1]
[2]
[3]
[4]
[1]
[2]
[3]
[4]
Confirm that the DR flag in FLSR is 1 to ensure that
receive data is in the buffer. When the OUT2 bit in
FMCR and the ERBFI bit in FIER are set to 1, a
receive data ready interrupt occurs.
Read the RXFIFOERR, BI, FE, PE, and OE flags in
error has occurred, perform error processing. When
the OUT2 bit in FMCR and the ELSI bit in FIER are
set to 1, a receive line status interrupt occurs.
Read the receive data in FRBR.
Check the DR flag in FLSR. When the DR flag is
cleared to 0 and all data has been read, data reception
is complete.
FLSR to ensure that no error has occurred. If an