DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 484

MCU 16BIT FLASH 3V 160K 144-TQFP

DF2117VT20V

Manufacturer Part Number
DF2117VT20V
Description
MCU 16BIT FLASH 3V 160K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VT20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VT20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VT20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
15.6.2
Before transmitting and receiving data, you should first clear the TE and RE bits in SCR to 0, then
initialize the SCI as described in a sample flowchart in figure 15.15. When the operating mode,
transfer format, etc., is changed, the TE and RE bits must be cleared to 0 before making the
change using the following procedure. When the TE bit is cleared to 0, the TDRE flag in SSR is
set to 1. However, clearing the RE bit to 0 does not initialize the RDRF, PER, FER, and ORER
flags in SSR, or RDR.
Rev. 2.00 Sep. 28, 2009 Page 442 of 994
REJ09B0452-0200
SCI Initialization (Clocked Synchronous Mode)
Note: In simultaneous transmit and receive operations, the TE and RE bits should
Clear TE and RE bits in SCR to 0
Set CKE1 and CKE0 bits in SCR
Set TE and RE bits in SCR to 1,
Set data transfer format in
andset RIE, TIE, TEIE,
(TE and RE bits are 0)
1-bit interval elapsed?
both be cleared to 0 or set to 1 simultaneously.
Set value in BRR
Start initialization
SMR and SCMR
<Transfer start>
and MPIE bits
Figure 15.15 Sample SCI Initialization Flowchart
Yes
Wait
No
[1]
[2]
[3]
[4]
[1] Set the data transfer format in SMR
[2] Set the clock selection in SCR. Be
[3] Write a value corresponding to the bit
[4] Wait at least one bit interval, then set
and SCMR.
sure to clear bits RIE, TIE, TEIE,
MPIE, TE, and RE to 0.
rate to BRR. This step is not
necessary if an external clock is used.
the TE bit or RE bit in SCR to 1.
Also set the RIE, TIE, TEIE, and MPIE
bits.
Setting the TE and RE bits enables the
TxD and RxD pins to be used.

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