DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 801

• Manufacturer Part Number: DF2117VT20V
• Description: MCU 16BIT FLASH 3V 160K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VT20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

24.7.1
The programming/erasing interface registers are 8-bit registers that can be accessed only in bytes.
These registers are initialized by a power-on reset.
(1)
FCCS monitors errors during programming/erasing the flash memory and requests the on-chip
program to be downloaded to the on-chip RAM.
Bit
7
6
5
4
Flash Code Control/Status Register (FCCS)
Programming/Erasing Interface Registers
Bit Name
⎯
⎯
⎯
FLER
Initial
Value
1
0
0
0
R/W
R
R
R
R
Description
Reserved
These are read-only bits and cannot be modified.
Flash Memory Error
0: Flash memory operates normally (Error protection is
[Clearing condition]
•
1: An error occurs during programming/erasing flash
[Setting conditions]
•
•
•
Indicates that an error has occurred during programming
or erasing the flash memory. When this bit is set to 1,
the flash memory enters the error protection state.
When this bit is set to 1, high voltage is applied to the
internal flash memory. To reduce the damage to the
flash memory, the reset must be released after the reset
input period (period of RES = 0) of at least 100 μs.
invalid)
At a power-on reset
memory (Error protection is valid)
When an interrupt, such as NMI, occurs during
programming/erasing.
When the flash memory is read during
programming/erasing (including a vector read and
an instruction fetch).
When the SLEEP instruction is executed during
programming/erasing (including software standby
mode).
Rev. 2.00 Sep. 28, 2009 Page 759 of 994
REJ09B0452-0200