DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 641

• Manufacturer Part Number: DF2117VT20V
• Description: MCU 16BIT FLASH 3V 160K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VT20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

19.4
19.4.1
In a receive operation, both KCLK (clock) and KD (data) are outputs on the keyboard side and
inputs on this LSI chip (system) side. KD receives a start bit, 8 data bits (LSB-first), an odd parity
bit, and a stop bit, in that order. The KD value is valid when KCLK is low. Value of KD is valid
when the KCLK is low. A sample receive processing flowchart is shown in figure 19.3, and the
receive timing in figure 19.4.
Receive data processing
Operation
Receive Operation
(receive enabled state)
Receive enabled state
and KDI bits both
Clear KBF flag
Set KBIOE bit
Read KBCRH
Read KBBR
Set KBE bit
KBS = 1?
KBF = 1?
PER = 0?
KCLKI
Start
1?
Yes
Yes
Yes
Yes
Figure 19.3 Sample Receive Processing Flowchart
[1]
[2]
[3]
No
No
No
No
[6]
Error handling
Keyboard side in data
Execute receive abort
transmission state.
[4]
processing.
[5]
[1] Set the KBIOE bit to 1 in KBCRL.
[2] Read KBCRH, and if the KCLKI and KDI bits
[3] Detect the start bit output on the keyboard
[4] When a stop bit is received, the keyboard
[5] Perform receive data processing.
[6] Clear the KBF flag to 0 in KBCRL.
The receive operation can be continued by
are both 1, set the KBE bit (receive enabled
state).
side and receive data in synchronization with
the fall of KCLK.
buffer controller drives KCLK low to disable
keyboard transmission (automatic I/O inhibit).
If the KBIE bit is set to 1 in KBCRH, an
interrupt request is sent to the CPU at the
same time.
At the same time, the system automatically
drives KCLK high, setting the receive enabled
state.
Rev. 2.00 Sep. 28, 2009 Page 599 of 994
REJ09B0452-0200