DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 361

• Manufacturer Part Number: DF2117VT20V
• Description: MCU 16BIT FLASH 3V 160K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VT20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(3)
The CMF flag in TCMCSR is set in the last state where the values in TCMCNT and TCMMLCM
match in timer mode. Therefore, a compare match signal is not generated until a further cycle of
the TCMCNT input clock is generated after a match between the values in TCMCNT and
TCMMLCM. For details, see section 11.6.2, Conflict between TCMMLCM Write and Compare
Match. Figure 11.6 shows the timing with which the CMF flag is set.
11.4.2
When the TCMMDS bit in TCMCR is set to 1, the TCM operates in cycle measurement mode.
(1)
Setting the TCMMDS bit in TCMCR to 1 selects cycle measurement mode, in which counting up
proceeds regardless of the setting of the CST bit in TCMCR. TCMCNT is cleared to H'0000 on
detection of the first edge in the measurement period and counts up from there. Figure 11.7 shows
an example of counter operation in cycle measurement mode.
CMF Set Timing when a Compare Match occurs
Counter Operation
φ
TCMCYI
TCMCNT
clear signal
TCMCNT
input clock
TCMCNT
φ
TCMCNT
TCMMLC
Compare match
signal
CMF
Cycle Measurement Mode
Figure 11.7 Example of Counter Operation in Cycle Measurement Mode
Figure 11.6 Timing of CMF Flag Setting on a Compare Match
N
H'0000
N
H'0001
N
H'0002
Rev. 2.00 Sep. 28, 2009 Page 319 of 994
N + 1
H'0003
H'0000
REJ09B0452-0200
H'0001