DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 711

• Manufacturer Part Number: DF2117VT20V
• Description: MCU 16BIT FLASH 3V 160K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VT20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 20.7 Scope of Initialization in Each LPC interface Mode
Note: System reset: Reset by RES pin input, or WDT overflow
Items Initialized
LPC transfer cycle sequencer (internal state), LPCBSY and ABRT
flags
SERIRQ transfer cycle sequencer (internal state), CLKREQ and
IRQBSY flags
LPC interface flags
(IBF1, IBF2, IBF3A, IBF3B, IBF4, MWMF, C/D1, C/D2, C/D3, C/D4,
OBF1, OBF2, OBF3A, OBF3B, OBF4, SWMF, DBU), GA20 (internal
state)
Host interrupt enable bits
(IRQ1E1, IRQ12E1, SMIE2, IRQ6E2, IRQ9E2 to IRQ11E2, SMIE3B,
SMIE3A, IRQ6E3, IRQ9E3 to IRQ11E3, SELREQ, SMIE4, IRQ6E4,
IRQ9E4 to IRQ11E4, IEDIR2 to IEDIR4), Q/C flag
LRST flag
SDWN flag
LRSTB bit
SDWNB bit
SDWNE bit
LPC interface operation control bits
(LPC4E to LPC1E, FGA20E, LADR1 to LADR4, IBFIE1 to IBFIE4,
PMEE, PMEB, LSMIE, LSMIB, LSCIE, LSCIB, TWRE, SELSTR3,
SELIRQ1, SELSMI, SELIRQ3 to SELIRQ15, OBEIE, SCIFE, IDR1 to
IDR4, ODR1 to ODR4, TWR0 to TWR15, SCSIRQ0 to SCSIRQ3,
and SCIFADRH/L)
LRESET signal
LPCPD signal
LAD3 to LAD0, LFRAME, LCLK, SERIRQ, CLKRUN signals
PME, LSMI, LSCI, GA20 signals (when function is selected)
PME, LSMI, LSCI, GA20 signals (when function is not selected)
LPC reset: Reset by LPC hardware reset (HR) or LPC software reset (SR)
LPC shutdown: Reset by LPC hardware shutdown (HS) or LPC software shutdown (SS)
Rev. 2.00 Sep. 28, 2009 Page 669 of 994
System
Reset
Initialized
Initialized
Initialized
Initialized
Initialized (0) Can be
Initialized (0) Initialized (0) Can be
Initialized (0) HR: 0
Initialized (0) Initialized (0) HS: 0
Initialized (0) Initialized (0) HS: 1
Initialized
Input (port
function
LPC Reset
Initialized
Initialized
Initialized
Initialized
set/cleared
SR: 1
Retained
Input
Input
Input
Output
Port function Port function
REJ09B0452-0200
LPC
Shutdown
Initialized
Initialized
Retained
Retained
Can be
set/cleared
set/cleared
0 (can be
set)
SS: 1
SS: 0 or 1
Retained
Input
Input
Hi-Z
Hi-Z