DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 918

• Manufacturer Part Number: DF2117VT20V
• Description: MCU 16BIT FLASH 3V 160K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VT20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Register Name
Timer control register_0
Timer control register_1
Timer control/status register_0
Timer control/status register_1
Time constant register A_0
Time constant register A_1
Time constant register B_0
Time constant register B_1
Timer counter _0
Timer counter _1
I
I
I
Second slave address register_0
I
Slave address register_0
Keyboard control register H_3
Keyboard control register L_3
Keyboard data buffer register_3
Keyboard control register 2_3
Timer control/status register
Timer control/status register
Timer counter _1
Timer counter _1
Timer control register_X
Timer control register_Y
Keyboard matrix interrupt register
Timer control/status register_X
Timer control/status register_Y
Pull-up MOS control register
Rev. 2.00 Sep. 28, 2009 Page 876 of 994
REJ09B0452-0200
2
2
2
2
C bus control register_0
C bus status register_0
C bus data register_0
C bus mode register_0
Abbreviation
TCR_0
TCR_1
TCSR_0
TCSR_1
TCORA_0
TCORA_1
TCORB_0
TCORB_1
TCNT_0
TCNT_1
ICCR_0
ICSR_0
ICDR_0
SARX_0
ICMR_0
SAR_0
KBCRH_3
KBCRL_3
KBBR_3
KBCR2_3
TCSR_1
TCSR_1
TCNT_1
TCNT_1
TCR_X
TCR_Y
KMIMR
TCSR_X
TCSR_Y
KMPCR
Number
of bits
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Address
H'FFCA
H'FFCB
H'FFCC
H'FFCD
H'FFD0
H'FFD1
H'FFEA (Write)
H'FFEA (Read)
H'FFEA (Write)
H'FFEB (Read)
H'FFF0
H'FFF0
(RELOCATE = 0)
(RELOCATE = 0)
H'FFF1
H'FFF1
(RELOCATE = 0)
H'FFF2
(RELOCATE = 0)
H'FFC8
H'FFC9
H'FFCE
H'FFCF
H'FFD8
H'FFD9
H'FFDE
H'FFDE
H'FFDF
H'FFDF
H'FFE0
H'FFE1
H'FFE2
H'FFE3
H'FFF1
TMR_0
TMR_1
TMR_0
TMR_1
TMR_0
TMR_1
IIC_0
IIC_0
PS2_3
WDT_1
TMR_X
TMR_X
Module
TMR_0
TMR_1
TMR_0
TMR_1
IIC_0
IIC_0
IIC_0
IIC_0
PS2_3
PS2_3
PS2_3
WDT_1
WDT_1
WDT_1
TMR_Y
INT
TMR_Y
PORT
Data
Width
8
8
8
8
16
16
16
16
16
16
8
8
8
8
8
8
8
8
8
16
8
16
8
8
8
8
8
8
8
8
Access
States
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2