DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 595

MCU 16BIT FLASH 3V 160K 144-TQFP

DF2117VT20V

Manufacturer Part Number
DF2117VT20V
Description
MCU 16BIT FLASH 3V 160K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VT20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VT20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VT20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bit
2
1
Bit Name
AAS
ADZ
Initial
Value
0
0
R/W
R/(W)* Slave Address Recognition Flag
R/(W)* General Call Address Recognition Flag
Description
In I
1 if the first frame following a start condition matches
bits SVA6 to SVA0 in SAR, or if the general call
address (H'00) is detected.
[Setting condition]
When the slave address or general call address (one
frame including a R/W bit is H'00) is detected in slave
receive mode and FS = 0 in SAR
[Clearing conditions]
In I
1 if the first frame following a start condition is the
general call address (H'00).
[Setting condition]
When the general call address (one frame including a
R/W bit is H'00) is detected in slave receive mode and
FS = 0 or FSX = 0
[Clearing conditions]
If a general call address is detected while FS=1 and
FSX=0, the ADZ flag is set to 1; however, the general
call address is not recognized (AAS flag is not set to 1).
2
2
When ICDR is written to (transmit mode) or read
from (receive mode)
When 0 is written in AAS after reading AAS = 1
In master mode
When ICDR is written to (transmit mode) or read
from (receive mode)
When 0 is written in ADZ after reading ADZ = 1
In master mode
C bus format slave receive mode, this flag is set to
C bus format slave receive mode, this flag is set to
Rev. 2.00 Sep. 28, 2009 Page 553 of 994
Section 18 I
2
C Bus Interface (IIC)
REJ09B0452-0200

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