DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 702

MCU 16BIT FLASH 3V 160K 144-TQFP

DF2117VT20V

Manufacturer Part Number
DF2117VT20V
Description
MCU 16BIT FLASH 3V 160K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VT20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VT20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VT20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
20.4
20.4.1
The LPC interface is activated by setting one of the following bits to 1: LPC3E to LPC1E in
HICR0 and LPC4E in HICR4. When the LPC interface is activated, the related I/O ports (P37 to
P30, P83 and P82) function as dedicated LPC interface input/output pins. In addition, setting the
FGA20E, PMEE, LSMIE, and LSCIE bits to 1 adds the related I/O ports (P81, P80, PB0, and
PB1) to the LPC interface's input/output pins.
Use the following procedure to activate the LPC interface after a reset release.
1. Read the signal line status and confirm that the LPC module can be connected. Also check that
2. When using channels 1, 2 and 4, set LADR1, LADR2, and LADR4 to determine the I/O
3. When using channel 3, set LADR3 to determine the I/O address and whether bidirectional data
4. Set the enable bit (LPC4E to LPC1E) for the channel to be used.
5. Set the enable bits (FGA20E, PMEE, LSMIE, and LSCIE) for the additional functions to be
6. Set the selection bits for other functions (SDWNE, IEDIR).
7. As a precaution, clear the interrupt flags (LRST, SDWN, ABRT, OBF, and OBEI). Read IDR
8. Set receive complete interrupt enable bits (IBFIE4 to IBFIE1, ERRIE, and OBEI) as necessary.
Rev. 2.00 Sep. 28, 2009 Page 660 of 994
REJ09B0452-0200
the LPC module is initialized internally.
address.
registers are to be used.
used.
or TWR15 to clear IBF.
Operation
LPC interface Activation

Related parts for DF2117VT20V