DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 549

• Manufacturer Part Number: DF2117VT20V
• Description: MCU 16BIT FLASH 3V 160K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VT20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit
5
4
Bit Name
THRE
BI
Initial Value R/W
1
0
R
R
Description
FTHR Empty
Indicates that FTHR is ready to accept new data for
transmission.
•
0: Transmit data of one or more bytes remains in the
[Clearing condition]
Transmit data is written to FTHR.
1: No transmit data remains in the transmit FIFO.
[Setting condition]
When the transmit FIFO becomes empty
•
0: Transmit data remains in FTHR.
[Clearing condition]
Transmit data is written to FTHR
1: No transmit data in FTHR
[Setting condition]
When data transfer from FTHR to FTSR is
completed
Break Interrupt
Indicates detection of the receive data break signal.
When the FIFO is enabled, a break interrupt occurs
in any receive data in the FIFO, and this bit is set
when the receive data is in the first FIFO buffer.
Reception of the next data starts after the input
receive data becomes mark and a valid start bit is
received.
0: Break signal not detected
[Clearing condition]
FLSR read
1: Break signal detected
[Setting condition]
When input receive data stays at space (low level)
for a reception time exceeding the length of one
frame
transmit FIFO.
When the FIFO is enabled
When the FIFO is disabled
Rev. 2.00 Sep. 28, 2009 Page 507 of 994
REJ09B0452-0200