DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 904

• Manufacturer Part Number: DF2117VT20V
• Description: MCU 16BIT FLASH 3V 160K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VT20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Register Name
TDP input capture register_2
TDP input capture buffer register_2
TDP status register_2
TDP control register 1_2
TDP interrupt enable register_2
TDP control register 2_2
TDP cycle lower limit register_2
TCM timer counter_0
TCM cycle upper limit register
TCM input capture register_0
TCM input capture buffer register_0 TCMICRF_0
TCM status register_0
TCM control register_0
TCM interrupt enable register_0
TCM cycle lower limit register_0
TCM timer counter_1
TCM cycle upper limit register_0
TCM input capture register_1
TCM input capture buffer register_1 TCMICRF_1
TCM status register_1
TCM control register_1
TCM interrupt enable register_1
TCM cycle lower limit register_1
TCM timer counter_2
TCM cycle upper limit register_2
TCM input capture register_2
TCM input capture buffer register_2 TCMICRF_2
TCM status register_2
TCM control register_2
TCM interrupt enable register_2
TCM cycle lower limit register_2
TCM timer counter_3
TCM cycle upper limit register_3
Rev. 2.00 Sep. 28, 2009 Page 862 of 994
REJ09B0452-0200
Abbreviation
TDPICR_2
TDPICRF_2
TDPCSR_2
TDPCR1_2
TDPIER_2
TDPCR2_2
TDPPDMN_2
TCMCNT_0
TCMMLCM_0
TCMICR_0
TCMCSR_0
TCMCR_0
TCMIER_0
TCMMINCM_0 16
TCMCNT_1
TCMMLCM_1
TCMICR_1
TCMCSR_1
TCMCR_1
TCMIER_1
TCMMINCM_1 16
TCMCNT_2
TCMMLCM_2
TCMICR_2
TCMCSR_2
TCMCR_2
TCMIER_2
TCMMINCM_2 16
TCMCNT_3
TCMMLCM_3
Number
of bits
16
16
8
8
8
8
16
16
16
16
16
8
8
8
16
16
16
16
8
8
8
16
16
16
16
8
8
8
16
16
Address
H'FB8A
H'FB8C
H'FB90
H'FBC0
H'FBC4
H'FBC6
H'FBCA
H'FBD0
H'FBD4
H'FBD6
H'FBDA
H'FBE0
H'FBE2
H'FBE4
H'FBE6
H'FBE8
H'FBE9
H'FBF0
H'FB88
H'FB8D
H'FB8E
H'FB8F
H'FBC2
H'FBC8
H'FBC9
H'FBCC
H'FBD2
H'FBD8
H'FBD9
H'FBDC
H'FBEA
H'FBEC
H'FBF2
TDP_2
TDP_2
TDP_2
TCM_0
TCM_1
TCM_2
TCM_2
TCM_2
TCM_2
TCM_2
TCM_2
TCM_3
TCM_3
Module
TDP_2
TDP_2
TDP_2
TDP_2
TCM_0
TCM_0
TCM_0
TCM_0
TCM_0
TCM_0
TCM_0
TCM_1
TCM_1
TCM_1
TCM_1
TCM_1
TCM_1
TCM_1
TCM_2
TCM_2
Data
Width
16
16
8
8
8
8
16
16
16
16
16
8
8
8
16
16
16
16
16
8
8
8
16
16
16
16
16
8
8
8
16
16
16
Access
States
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2