DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 757

• Manufacturer Part Number: DF2117VT20V
• Description: MCU 16BIT FLASH 3V 160K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VT20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(2)
If an LPC/FW memory write cycle for the FSI command space occurs, the FSI performs the FSI-
FLASH command write operation. Figure 21.12 shows an example of FSI Command write
operation.
As shown in figure 21.12, if a host address ranging from H'EFFF_F000 to H'EFFF_F00F is
accessed in LPC/FW memory write cycle while the CMDHBAR register is set to H'EFFF, the
write data is stored in FSICMDR, and then the CMDBUSY and FSICMDI flags in FSILSTR1 are
set to 1. In this case, an interrupt is requested according to the FSICMDIE state. Sync is not
returned if the host address to be input is out of the determined range. In FSI command write, no
wait cycle will be inserted to the LPC bus cycle. If the CMDBUSY flag is set to 1, Sync is not
returned during the operations other than FSI command read.
CMDHBAR: H'EFFF
FSI Command Write
H'EFFF_0000 *
H'EFFF_F000
H'EFFF_F00F
H'EFFF_FFFF
Note:
*
Figure 21.12 FSI Command Write Operation (Example)
The upper 16 bits of the host address are set to the value in the CMDHBAR register.
Host address
CMD0
CMD1
CMDE
CMDF
FSICMDR[7:0]
FSICMDI
B'0
FSICMDIE
CMDBUSY
B'0
Command data (H'00 to H'FF)
→
→
B'1
Rev. 2.00 Sep. 28, 2009 Page 715 of 994
B'1
B'1
Interrupt requests
REJ09B0452-0200