DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 26

• Manufacturer Part Number: DF2117VT20V
• Description: MCU 16BIT FLASH 3V 160K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VT20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2.8
2.9
Section 3 MCU Operating Modes .........................................................................67
3.1
3.2
3.3
3.4
Section 4 Exception Handling ...............................................................................75
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
Section 5 Interrupt Controller................................................................................85
5.1
5.2
5.3
Rev. 2.00 Sep. 28, 2009 Page xxiv of xl
REJ09B0452-0200
2.7.3
2.7.4
2.7.5
2.7.6
2.7.7
2.7.8
2.7.9
Processing States.................................................................................................................. 63
Usage Note........................................................................................................................... 65
2.9.1
Operating Mode Selection ................................................................................................... 67
Register Descriptions ........................................................................................................... 68
3.2.1
3.2.2
3.2.3
3.2.4
Operating Mode Descriptions .............................................................................................. 73
3.3.1
Address Map ........................................................................................................................ 74
Exception Handling Types and Priority............................................................................... 75
Exception Sources and Exception Vector Table.................................................................. 76
Reset .................................................................................................................................... 79
4.3.1
4.3.2
4.3.3
Interrupt Exception Handling............................................................................................... 81
Trap Instruction Exception Handling................................................................................... 81
Exception Handling by Illegal Instruction ........................................................................... 82
Stack Status after Exception Handling................................................................................. 83
Usage Note........................................................................................................................... 84
Features................................................................................................................................ 85
Input/Output Pins................................................................................................................. 87
Register Descriptions ........................................................................................................... 88
5.3.1
Register Indirect with Displacement⎯@(d:16, ERn) or @(d:32, ERn)................. 58
Register Indirect with Post-Increment or Pre-Decrement⎯@ERn+ or @-ERn..... 58
Absolute Address⎯@aa:8, @aa:16, @aa:24, or @aa:32....................................... 58
Immediate⎯#xx:8, #xx:16, or #xx:32.................................................................... 59
Program-Counter Relative⎯@(d:8, PC) or @(d:16, PC)....................................... 59
Memory Indirect⎯@@aa:8 ................................................................................... 60
Effective Address Calculation ................................................................................ 61
Notes on Using the Bit Operation Instruction......................................................... 65
Mode Control Register (MDCR) ............................................................................ 68
System Control Register (SYSCR) ......................................................................... 69
Serial Timer Control Register (STCR) ................................................................... 71
System Control Register 3 (SYSCR3) .................................................................... 73
Mode 2.................................................................................................................... 73
Reset Exception Handling ...................................................................................... 79
Interrupts Immediately after Reset.......................................................................... 80
On-Chip Peripheral Modules after Reset is Cancelled............................................ 80
Interrupt Control Registers A to D (ICRA to ICRD) .............................................. 89