DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 778

• Manufacturer Part Number: DF2117VT20V
• Description: MCU 16BIT FLASH 3V 160K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VT20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

22.4.2
In scan mode, A/D conversion is performed sequentially on the specified channels (max. four
channels or eight channels). Operations are as follows.
1. When the ADST bit in ADCSR is set to 1 by software, the TPU, or the TMR, A/D conversion
2. Continuous A/D conversion on up to four channels (SCANE = 1 and SCANS = 0) or
3. When A/D conversion for each channel is completed, the result is sequentially transferred to
4. When conversion of all the selected channels is completed, the ADF bit in ADCSR is set to 1.
5. The ADST bit is not automatically cleared to 0 so steps [2] and [3] are repeated as long as the
6. When the ADST bit is automatically cleared on completion of the A/D conversion of all of the
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starts on the first channel in the selected channel set.
continuous A/D conversion on up to eight channels (SCANE = 1 and SCANS = 1) can be
selected. When continuous A/D conversion on four channels is selected, A/D conversion starts
from the following channels: AN0 when CH3 = 0 and CH2 = 0, AN4 when CH3 = 0 and CH2
= 1, AN8 when CH3 = 1 and CH2 = 0, and AN12 when CH3 = 1 and CH2 = 1.
When continuous A/D conversion on eight channels is selected, A/D conversion starts from
the following channels: AN0 when CH3 = 0 and CH2 = 0 and AN8 when CH3 = 1 and CH2 =
0.
the A/D data register corresponding to each channel.
If the ADIE bit is set to 1 at this time, an ADI interrupt is requested. Conversion from the first
channel in the channel set starts again.
ADST bit remains set to 1. When the ADST bit is cleared to 0, A/D conversion stops and the
A/D converter enters wait state. After this, setting the ADST bit to 1 starts A/D conversion
from the first channel again.
selected channels with the ADSTCLR bit in ADCR set to 1, A/D conversion stops and enters
the wait state.
Scan Mode