DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 30

• Manufacturer Part Number: DF2117VT20V
• Description: MCU 16BIT FLASH 3V 160K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VT20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

10.4 Interface to Bus Master...................................................................................................... 265
10.5 Operation ........................................................................................................................... 267
10.6 Interrupts............................................................................................................................ 288
10.7 Operation Timing............................................................................................................... 290
10.8 Usage Notes ....................................................................................................................... 297
Section 11 16-Bit Cycle Measurement Timer (TCM).........................................305
11.1 Features.............................................................................................................................. 305
11.2 Input/Output Pins............................................................................................................... 307
11.3 Register Descriptions ......................................................................................................... 307
Rev. 2.00 Sep. 28, 2009 Page xxviii of xl
REJ09B0452-0200
10.3.6 Timer Counter (TCNT)......................................................................................... 263
10.3.7 Timer General Register (TGR) ............................................................................. 263
10.3.8 Timer Start Register (TSTR) ................................................................................ 263
10.3.9 Timer Synchro Register (TSYR) .......................................................................... 264
10.4.1 16-Bit Registers .................................................................................................... 265
10.4.2 8-Bit Registers ...................................................................................................... 265
10.5.1 Basic Functions..................................................................................................... 267
10.5.2 Synchronous Operation......................................................................................... 273
10.5.3 Buffer Operation................................................................................................... 275
10.5.4 PWM Modes......................................................................................................... 279
10.5.5 Phase Counting Mode........................................................................................... 283
10.6.1 Interrupt Source and Priority ................................................................................ 288
10.6.2 A/D Converter Activation..................................................................................... 289
10.7.1 Input/Output Timing ............................................................................................. 290
10.7.2 Interrupt Signal Timing ........................................................................................ 294
10.8.1 Input Clock Restrictions ....................................................................................... 297
10.8.2 Caution on Period Setting ..................................................................................... 297
10.8.3 Conflict between TCNT Write and Clear Operations........................................... 298
10.8.4 Conflict between TCNT Write and Increment Operations ................................... 298
10.8.5 Conflict between TGR Write and Compare Match............................................... 299
10.8.6 Conflict between Buffer Register Write and Compare Match.............................. 300
10.8.7 Conflict between TGR Read and Input Capture ................................................... 300
10.8.8 Conflict between TGR Write and Input Capture .................................................. 301
10.8.9 Conflict between Buffer Register Write and Input Capture.................................. 302
10.8.10 Conflict between Overflow/Underflow and Counter Clearing ............................. 303
10.8.11 Conflict between TCNT Write and Overflow/Underflow .................................... 304
10.8.12 Multiplexing of I/O Pins ....................................................................................... 304
10.8.13 Module Stop Mode Setting ................................................................................... 304
11.3.1 TCM Timer Counter (TCMCNT) ......................................................................... 309
11.3.2 TCM Cycle Upper Limit Register (TCMMLCM) ................................................ 309