DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 490

• Manufacturer Part Number: DF2117VT20V
• Description: MCU 16BIT FLASH 3V 160K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VT20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev. 2.00 Sep. 28, 2009 Page 448 of 994
REJ09B0452-0200
Figure 15.20 Sample Flowchart of Simultaneous Serial Transmission and Reception
Notes: 1. When switching from transmit or receive operation to simultaneous transmit and receive
No
No
No
2. Do not write to SMR, SCR, BRR, and SDCR from the start to the end of transmission/reception
Clear TE and RE bits in SCR to 0
Write transmit data to TDR and
Read receive data in RDR, and
operations, first clear the TE bit and RE bit to 0, then set both these bits to 1 simultaneously.
except the process of [6].
clear RDRF flag in SSR to 0
Start transmission/reception
clear TDRE flag in SSR to 0
End transmission/reception
Read ORER flag in SSR
Read TDRE flag in SSR
Read RDRF flag in SSR
All data received?
Initialization
ORER = 1
TDRE = 1
RDRF = 1
Yes
Yes
Yes
No
Error processing
Yes
[1]
[2]
[4]
[5]
[6]
[3]
[1] SCI initialization:
[2] SCI status check and transmit data write:
[3] Receive error processing:
[4] SCI status check and receive data read:
[5] Serial transmission/reception
The TxD pin is designated as the
transmit data output pin, and the RxD pin
is designated as the receive data input
pin, enabling simultaneous transmit and
receive operations.
Read SSR and check that the TDRE flag
is set to 1, then write transmit data to
TDR and clear the TDRE flag to 0.
Transition of the TDRE flag from 0 to 1
can also be identified by a TXI interrupt.
If a receive error occurs, read the ORER
flag in SSR, and after performing the
appropriate error processing, clear the
ORER flag to 0. Transmission/reception
cannot be resumed if the ORER flag is
set to 1.
Read SSR and check that the RDRF flag
is set to 1, then read the receive data in
RDR and clear the RDRF flag to 0.
Transition of the RDRF flag from 0 to 1
can also be identified by an RXI
interrupt.
continuation procedure:
To continue serial transmission/
reception, before the MSB (bit 7) of the
current frame is received, finish reading
the RDRF flag, reading RDR, and
clearing the RDRF flag to 0. Also, before
the MSB (bit 7) of the current frame is
transmitted, read 1 from the TDRE flag
to confirm that writing is possible. Then
write data to TDR and clear the TDRE
flag to 0.