DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 559

MCU 16BIT FLASH 3V 160K 144-TQFP

DF2117VT20V

Manufacturer Part Number
DF2117VT20V
Description
MCU 16BIT FLASH 3V 160K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VT20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VT20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VT20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(2)
Figure 17.4 shows an example of the data transmission flowchart.
(End of transmission or transmission standby)
Serial Data Transmission
Clear BREAK bit in FLCR to 0
Write transmit data to FTHR
Set BREAK bit in FLCR to 1
Read THRE flag in FLSR
Read TEMT flag in FLSR
Break time completed
Start transmission
All data written
Break output
Initialization
THRE = 1?
TEMT = 1
Yes
Yes
Yes
Yes
Yes
Figure 17.4 Example of Data Transmission Flowchart
No
No
No
No
[1]
[2]
[3]
[1] Confirm that the THRE flag in FLSR is 1, and write transmit
[2] Read the TEMT flag in FLSR, and confirm that TEMT is set to
[3] To output a break at the end of serial transmission, set the
data to FTHR. When FIFOs are used, write 1-byte to 16-byte
transmit data. When the OUT2 bit in FMCR and the ETBEI bit
in FIER are set to 1, an FTHR empty interrupt occurs. When
data is written to FTHR, it is transferred automatically to FTSR.
The data is then transmitted from the FTxD pin in the order of
the start bit, transmit data, parity bit, and stop bit.
1 to ensure that all transmit data has been transmitted.
BREAK bit in FLCR to 1. After completion of the break time,
clear the BREAK bit in FLCR to 0 to clear the break.
Rev. 2.00 Sep. 28, 2009 Page 517 of 994
REJ09B0452-0200

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