DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 684

MCU 16BIT FLASH 3V 160K 144-TQFP

DF2117VT20V

Manufacturer Part Number
DF2117VT20V
Description
MCU 16BIT FLASH 3V 160K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VT20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VT20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VT20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Note:
Rev. 2.00 Sep. 28, 2009 Page 642 of 994
REJ09B0452-0200
Bit
3
2
1
0
Bit Name Initial Value Slave
C/D3
DBU32
IBF3A
OBF3A
* Only 0 can be written to clear the flag.
0
0
0
0
R
R/W
R
R/(W)* R
R/W
Host Description
R
R
R
Defined by User
Command/Data Flag
When the host writes to IDR3, bit 2 of the I/O
address is written into this bit to indicate whether
IDR3 contains data or a command.
0: Content of input data register (IDR3) is a data
1: Content of input data register (IDR3) is a
The user can use this bit as necessary.
Input Buffer Full
This bit is an internal interrupt source to the slave
(this LSI).
0: [Clearing condition]
When the slave reads IDR3
1: [Setting condition]
When the host writes to IDR3 in I/O write cycle
Output Buffer Full
0: [Clearing conditions]
1: [Setting condition]
When the slave writes to ODR3
command
When the host reads ODR3 in I/O read cycle
When the slave writes 0 to the OBF3 bit

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