DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 92

• Manufacturer Part Number: DF2117VT20V
• Description: MCU 16BIT FLASH 3V 160K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VT20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 2.5
Note:
Table 2.6
Note:
Rev. 2.00 Sep. 28, 2009 Page 50 of 994
REJ09B0452-0200
Instruction
AND
OR
XOR
NOT
Instruction
SHAL
SHAR
SHLL
SHLR
ROTL
ROTR
ROTXL
ROTXR
* Refers to the operand size.
* Refers to the operand size.
B:
W: Word
L:
B:
W: Word
L:
Logic Operations Instructions
Shift Instructions
Byte
Longword
Byte
Longword
B/W/L
B/W/L
B/W/L
B/W/L
Size*
B/W/L
B/W/L
B/W/L
B/W/L
Size*
Function
Rd ∧ Rs → Rd, Rd ∧ #IMM → Rd
Performs a logical AND operation on a general register and another
general register or immediate data.
Rd ∨ Rs → Rd, Rd ∨ #IMM → Rd
Performs a logical OR operation on a general register and another
general register or immediate data.
Rd ⊕ Rs → Rd, Rd ⊕ #IMM → Rd
Performs a logical exclusive OR operation on a general register and
another general register or immediate data.
∼
Takes the one’s complement (logical complement) of general register
contents.
Function
Rd (shift) → Rd
Performs an arithmetic shift on general register contents.
1-bit or 2-bit shifts are possible.
Rd (shift) → Rd
Performs a logical shift on general register contents.
1-bit or 2-bit shifts are possible.
Rd (rotate) → Rd
Rotates general register contents.
1-bit or 2-bit rotations are possible.
Rd (rotate) → Rd
Rotates general register contents through the carry flag.
1-bit or 2-bit rotations are possible.
(Rd) → (Rd)