DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 554

• Manufacturer Part Number: DF2117VT20V
• Description: MCU 16BIT FLASH 3V 160K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VT20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

17.3.14 SCIF Control Register (SCIFCR)
SCIFCR controls SCIF operations, and is accessible only from the CPU.
Rev. 2.00 Sep. 28, 2009 Page 512 of 994
REJ09B0452-0200
Bit
7
6
5
4
3
2
1
0
Bit Name
SCIFOE1
SCIFOE0
⎯
OUT2LOOP
CKSEL1
CKSEL0
SCIFRST
REGRST
Initial Value R/W
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
These bits enable or disable PORT output of the
SCIF.
For details, see table 17.5.
Reserved
Do not change the initial value.
Enables or disables interrupts during a loopback
test.
0: Interrupt enabled
1: Interrupt disabled
These bits select the clock (SCLK) to be input to the
baud rate generator.
00: LCLK divided by 18
01: System clock divided by 11
10: Reserved for LCLK (not selectable)
11: Reserved for system clock (not selectable)
Resets the baud rate generator, FRSR, and FTSR.
0: Normal operation
1: Reset
Resets registers (except SCIFCR) accessible from
the H8S CPU or LPC interface.
0: Normal operation
1: Reset