HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 18

MCU 3V 384K I-TEMP 100-TQFP

HD64F2239TF20I

Manufacturer Part Number
HD64F2239TF20I
Description
MCU 3V 384K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet

Specifications of HD64F2239TF20I

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2239TF20I
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Item
16.6 Usage Notes
Figure 16.22 Flowchart and
Timing of Start Condition
Instruction Issuance for
Retransmission
Figure 16.23 Timing of Stop
Condition Issuance
Figure 16.25 ICDR Read
and ICCR Access Timing in
Slave Transmit Mode
17.2 Input/Output Pins
Table 17.1 Pin Configuration
Rev. 6.00 Mar. 18, 2010 Page xvi of lx
REJ09B0054-0600
Page
681
682
683
691
Revision (See Manual for Details)
Figure amended
IRIC
Figure amended
SDA
Figure amended
TRS bit
Table amended
Note added
Note: * In the case of the H8S/2239 Group, H8S/2227
IRIC
Pin Name
Analog power supply pin
Analog ground pin
Reference voltage pin
Analog input pin 0
Analog input pin 1
SCL
SDA
SCL
SDA
SCL
[1] IRIC determination
Address received
ACK
Group, H8S/2238R, and H8S/2236R, AN0 and
AN1 may be used only when Vcc = AVcc.
VIH
R/W
9
8
9th clock
As waveform rise is late,
[1] Determination of SCL = low
SCL is detected as low
[2] Detemination of SCL = Low
[3] (Restart) Start condition instruction issuance
High period secured
Detection of 9th clock
cycle rising edge
Symbol
AV
AV
Vref
AN0*
AN1*
CC
SS
A
9
Period when ICDR reads and ICCR
reads and writes are prohibited
(6 system clock cycles)
I/O
Input
Input
Input
Input
Input
Start condition
(retransmission)
Waveforms if
problem occurs
Function
Analog block power supply and reference
voltage
Analog block ground and reference voltage
Reference voltage for A/D conversion
Group 0 analog input pins
[4] IRIC determination
[2] Stop condition instruction issuance
[5] ICDR write (next transmit data)
Stop condition
Data output
Bit 7
Data transmission
Bit 7
ICDR write

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