HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 36

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

16.4 Operation .......................................................................................................................... 653
16.5 Interrupt Source ................................................................................................................ 676
16.6 Usage Notes ...................................................................................................................... 676
Section 17 A/D Converter .................................................................................689
17.1 Features............................................................................................................................. 689
17.2 Input/Output Pins .............................................................................................................. 691
17.3 Register Descriptions ........................................................................................................ 692
17.4 Interface to Bus Master ..................................................................................................... 696
17.5 Operation .......................................................................................................................... 697
17.6 Interrupt Source ................................................................................................................ 701
17.7 A/D Conversion Accuracy Definitions ............................................................................. 702
17.8 Usage Notes ...................................................................................................................... 704
Rev. 6.00 Mar. 18, 2010 Page xxxiv of lx
REJ09B0054-0600
16.3.5 Serial Control Register X (SCRX)....................................................................... 643
16.3.6 I
16.3.7 I
16.3.8 DDC Switch Register (DDCSWR) ...................................................................... 653
16.4.1 I
16.4.2 Initial Setting........................................................................................................ 655
16.4.3 Master Transmit Operation .................................................................................. 655
16.4.4 Master Receive Operation.................................................................................... 659
16.4.5 Slave Receive Operation...................................................................................... 664
16.4.6 Slave Transmit Operation .................................................................................... 669
16.4.7 IRIC Setting Timing and SCL Control ................................................................ 672
16.4.8 Operation Using the DTC .................................................................................... 673
16.4.9 Noise Canceler ..................................................................................................... 674
16.4.10 Initialization of Internal State .............................................................................. 674
16.6.1 Module Stop Mode Setting .................................................................................. 687
17.3.1 A/D Data Registers A to D (ADDRA to ADDRD) ............................................. 692
17.3.2 A/D Control/Status Register (ADCSR) ............................................................... 693
17.3.3 A/D Control Register (ADCR) ............................................................................ 695
17.5.1 Single Mode......................................................................................................... 697
17.5.2 Scan Mode ........................................................................................................... 698
17.5.3 Input Sampling and A/D Conversion Time ......................................................... 699
17.5.4 External Trigger Input Timing............................................................................. 701
17.8.1 Module Stop Mode Setting .................................................................................. 704
17.8.2 Permissible Signal Source Impedance ................................................................. 704
17.8.3 Influences on Absolute Accuracy ........................................................................ 704
17.8.4 Range of Analog Power Supply and Other Pin Settings ...................................... 705
17.8.5 Notes on Board Design ........................................................................................ 705
2
2
2
C Bus Control Register (ICCR) ......................................................................... 644
C Bus Status Register (ICSR)............................................................................ 649
C Bus Data Format ............................................................................................ 653