HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 215

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

(2) Determination of priority
The DTC startup source is selected according to the default priority. This is not influenced by the
mask level or the priority level. See section 9.4, Location of Register Information and DTC Vector
Table, for details on these priorities.
The startup sources are directly input to each channel in the DMAC*.
Note: * Supported only by the H8S/2239 Group.
(3) Operating Sequence
When the same interrupt is selected as both the DTC startup source and a CPU interrupt source,
the DTC data transfer is performed and then the CPU interrupt exception handling is performed.
When the same interrupt is selected as both the DMAC* startup source and either the DTC startup
source or a CPU interrupt source, the operations are performed independently. They are performed
according to the operating states and the bus priorities.
Table 5.9 shows the interrupt source selection and the interrupt source clear control according to
the settings of the DMAC* DMABCR DTA bit, the DTC DTCERA to DTCERF DTCE bits, and
the DTC MRB DISEL bit.
Note: * Supported only by the H8S/2239 Group.
Table 5.9
Legend:
×:
*:
Note:
:
:
DMAC *
DTA
0
1
The corresponding interrupt is used. The interrupt source is cleared.
(The CPU must clear the source flag in the interrupt handler.)
The corresponding interrupt is used. The interrupt source is not cleared.
The corresponding interrupt is not used.
Don't care
1. Supported only by the H8S/2239 Group.
1
Interrupt Source Selection and Clear Control
Settings
DTCE
0
1
*
DTC
DISEL
0
1
*
*
Interrupt source selection and clear control
DMAC *
Rev. 6.00 Mar. 18, 2010 Page 153 of 982
1
Section 5 Interrupt Controller
DTC
×
×
REJ09B0054-0600
CPU
×
×