HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 287

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Bit
6
Bit Name
DTE1
Initial Value
0
R/W
R/W
Description
Data Transfer Enable 1
Enables or disables DMA transfer for the
activation source selected by the DTF3 to DTF0
bits in DMACR of channel 1.
When DTE1 = 0, data transfer is disabled and
the activation source is ignored. If the activation
source is an internal interrupt, an interrupt
request is issued to the CPU or DTC. If the
DTE1 bit is cleared to 0 when DTIE1 = 1, the
DMAC regards this as indicating the end of a
transfer, and issues a transfer end interrupt
request to the CPU.
When DTE1 = 1 and DTME1 = 1, data transfer
is enabled and the DMAC waits for a request by
the activation source. When a request is issued
by the activation source, DMA transfer is
executed.
0: Data transfer is disabled
1: Data transfer is enabled
[Clearing conditions]
•
•
•
[Setting condition]
When 1 is written to the DTE1 bit after reading
DTE1 = 0
When initialization is performed
When the specified number of transfers
have been completed
When 0 is written to the DTE1 bit to forcibly
suspend the transfer, or for a similar reason
Rev. 6.00 Mar. 18, 2010 Page 225 of 982
Section 8 DMA Controller (DMAC)
REJ09B0054-0600