HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 661

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

15.5.2
Figure 15.16 shows a sample flowchart for multiprocessor serial data reception. If the MPIE bit in
SCR is set to 1, data is skipped until data with a 1 multiprocessor bit is sent. On receiving data
with a 1 multiprocessor bit, the receive data is transferred to RDR. An RXI interrupt request is
generated at this time. All other SCI operations are the same as in asynchronous mode. Figure
15.15 shows an example of SCI operation for multiprocessor format reception.
MPIE
RDRF
RDR
value
MPIE
RDRF
RDR
value
Multiprocessor Serial Data Reception
1
1
Start
bit
Start
bit
(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit)
0
0
MPIE = 0
Figure 15.15 Example of SCI Operation in Reception
MPIE = 0
D0
D0
ID1
D1
D1
Data (ID1)
Data (ID2)
RXI interrupt
request
(multiprocessor
interrupt)
generated
RXI interrupt
request
(multiprocessor
interrupt)
generated
D7
D7
(a) Data does not match station's ID
(b) Data matches station's ID
processor
processor
Multi-
Multi-
bit
1
bit
1
RDR data read and
RDRF flag cleared
to 0 in RXI interrupt
service routine
RDR data read
and RDRF flag
cleared to 0 in
RXI interrupt
service routine
Stop
bit
Stop
bit
1
1
Section 15 Serial Communication Interface (SCI)
Start
bit
Start
bit
0
0
D0
D0
Rev. 6.00 Mar. 18, 2010 Page 599 of 982
If not this station’s ID,
MPIE bit is set to 1
again
Matches this station’s ID,
so reception continues, and
data is received in RXI
interrupt service routine
D1
D1
Data (Data1)
Data (Data2)
ID2
ID1
D7
D7
processor
processor
Multi-
Multi-
bit
bit
0
0
RXI interrupt request is
not generated, and RDR
retains its state
Stop
bit
Stop
bit
1
1
MPIE bit set to 1
again
REJ09B0054-0600
Mark state
(idle state)
Mark state
(idle state)
Data2
1
1