HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 54

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 1 Overview
Table 1.1
Table 1.2
Table 1.3
Table 1.4
Table 1.5
Table 1.6
Table 1.7
Table 1.8
Section 2 CPU
Table 2.1
Table 2.2
Table 2.3
Table 2.4
Table 2.5
Table 2.6
Table 2.7
Table 2.8
Table 2.9
Table 2.10
Table 2.11
Table 2.12
Table 2.13
Section 3 MCU Operating Modes
Table 3.1
Table 3.2
Section 4 Exception Handling
Table 4.1
Table 4.2
Table 4.3
Table 4.4
Table 4.5
Rev. 6.00 Mar. 18, 2010 Page lii of lx
REJ09B0054-0600
Pin Arrangements in Each Mode of H8S/2258 Group ........................................... 20
Pin Arrangements in Each Mode of H8S/2239 Group ........................................... 24
Pin Arrangements in Each Mode of H8S/2238 Group ........................................... 29
Pin Arrangements in Each Mode of H8S/2237 Group ........................................... 34
Pin Arrangements in Each Mode of H8S/2227 Group ........................................... 39
Pin Functions of H8S/2258 Group ......................................................................... 44
Pin Functions of H8S/2239 Group and H8S/2238 Group ...................................... 50
Pin Functions of H8S/2237 Group and H8S/2227 Group ...................................... 57
Instruction Classification........................................................................................ 79
Operation Notation................................................................................................. 80
Data Transfer Instructions ...................................................................................... 81
Arithmetic Operations Instructions ........................................................................ 82
Logic Operations Instructions ................................................................................ 84
Shift Instructions .................................................................................................... 84
Bit Manipulation Instructions................................................................................. 85
Branch Instructions ................................................................................................ 87
System Control Instructions ................................................................................... 88
Block Data Transfer Instructions ........................................................................... 89
Addressing Modes.................................................................................................. 90
Absolute Address Access Ranges .......................................................................... 92
Effective Address Calculation................................................................................ 94
MCU Operating Mode Selection............................................................................ 103
Pin Functions in Each Operating Mode.................................................................. 108
Exception Types and Priority ................................................................................. 119
Exception Handling Vector Table .......................................................................... 120
Reset Types ............................................................................................................ 121
Status of CCR and EXR after Trace Exception Handling...................................... 124
Status of CCR and EXR after Trap Instruction Exception Handling ..................... 125
Tables