HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 271

MCU 3V 384K I-TEMP 100-TQFP

HD64F2239TF20I

Manufacturer Part Number
HD64F2239TF20I
Description
MCU 3V 384K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet

Specifications of HD64F2239TF20I

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2239TF20I
Manufacturer:
Renesas Electronics America
Quantity:
10 000
8.3.4
DMACR controls the operation of each DMAC channel.
The DMA has four DMACR registers: DMACR_0A in channel 0 (channel 0A), DMACR_0B in
channel 0 (channel 0B), DMACR_1A in channel 1 (channel 1A), and DMACR_1B in channel 1
(channel 1B).
In short address mode, channels A and B operate independently, and in full address mode,
channels A and B operate together. The bit functions in the DMACR registers differ according to
the transfer mode.
(1) Short Address Mode
• DMACR_0A, DMACR_0B, DMACR_1A, and DMARC_1B
Bit
7
6
DMA Control Registers (DMACRA and DMACRB)
Bit Name
DTSZ
DTID
Initial Value
0
0
R/W
R/W
R/W
Description
Data Transfer Size
Selects the size of data to be transferred at
one time.
0: Byte-size transfer
1: Word-size transfer
Data Transfer Increment/Decrement
Selects incrementing or decrementing of MAR
after every data transfer in sequential mode or
repeat mode. In idle mode, MAR is neither
incremented nor decremented.
0: MAR is incremented after a data transfer
1: MAR is decremented after a data transfer
(Initial value)
When DTSZ = 0, MAR is incremented by 1
When DTSZ = 1, MAR is incremented by 2
When DTSZ = 0, MAR is decremented by
1
When DTSZ = 1, MAR is decremented by
2
Rev. 6.00 Mar. 18, 2010 Page 209 of 982
Section 8 DMA Controller (DMAC)
REJ09B0054-0600

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