HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 274

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 8 DMA Controller (DMAC)
Rev. 6.00 Mar. 18, 2010 Page 212 of 982
REJ09B0054-0600
Bit
3
2
1
0
Bit Name
DTF3
DTF2
DTF1
DTF0
Initial Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
Channel B:
0000: Setting prohibited
0001: Activated by A/D converter conversion
0010: Activated by DREQ pin falling edge
0011: Activated by DREQ pin low-level input
0100: Activated by SCI channel 0 transmit-
0101: Activated by SCI channel 0 receive-
0110: Activated by SCI channel 1 transmit-
0111: Activated by SCI channel 1 receive-
1000: Activated by TPU channel 0 compare
1001: Activated by TPU channel 1 compare
1010: Activated by TPU channel 2 compare
1011: Activated by TPU channel 3 compare
1100: Activated by TPU channel 4 compare
1101: Activated by TPU channel 5 compare
1110: Setting prohibited
1111: Setting prohibited
The same factor can be selected for more than
one channel. In this case, activation starts with
the highest-priority channel according to the
relative channel priorities. For relative channel
priorities, see section 8.5.11, Multi-Channel
Operation.
end interrupt
input (detected as a low level in the first
transfer after transfer is enabled)
data-empty interrupt
data-full interrupt
data-empty interrupt
data-full interrupt
match/input capture A interrupt
match/input capture A interrupt
match/input capture A interrupt
match/input capture A interrupt
match/input capture A interrupt
match/input capture A interrupt