HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 487

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Input Capture/Compare Match Interrupt: An interrupt is requested if the TGIE bit in TIER is
set to 1 when the TGF flag in TSR is set to 1 by the occurrence of a TGR input capture/compare
match on a particular channel. The interrupt request is cleared by clearing the TGF flag to 0. In the
H8S/2227 Group, the TPU has eight input capture/compare match interrupts, four for channel 0
and two each for channels 1 and 2. In other groups, the TPU has 16 input capture/compare match
interrupts, four each for channels 0 and 3, and two each for channels 1, 2, 4, and 5.
Overflow Interrupt: An interrupt is requested if the TCIEV bit in TIER is set to 1 when the
TCFV flag in TSR is set to 1 by the occurrence of TCNT overflow on a channel. The interrupt
request is cleared by clearing the TCFV flag to 0. In the H8S/2227 Group, the TPU has three
overflow interrupts, one each for channels 0 to 2. In other groups, the TPU has six overflow
interrupts, one each for channels 0 to 5.
Underflow Interrupt: An interrupt is requested if the TCIEU bit in TIER is set to 1 when the
TCFU flag in TSR is set to 1 by the occurrence of TCNT underflow on a channel. The interrupt
request is cleared by clearing the TCFU flag to 0. The TPU of the H8S/2227 Group has two
underflow interrupts, one each for channels 1 and 2. In other groups, the TPU has four underflow
interrupts, one each for channels 1, 2, 4, and 5.
11.6
The DTC can be activated by the TGR input capture/compare match interrupt for a channel. For
details, see section 9, Data Transfer Controller (DTC).
In the H8S/2227 Group, a total of eight TPU input capture/compare match interrupts can be used
as DTC activation sources, four for channel 0 and two each for channels 1 and 2. In other groups,
a total of 16 TPU input capture/compare match interrupts can be used as DTC activation sources,
four each for channels 0 and 3, and two each for channels 1, 2, 4, and 5.
11.7
The DMAC can be activated by the TGRA input capture/compare match interrupt for a channel.
For details, see section 8, DMA Controller (DMAC).
In the TPU, a total of six TGRA input capture/compare match interrupts can be used as DMAC
activation sources, one for each channel.
DTC Activation
DMAC Activation (H8S/2239 Group Only)
Rev. 6.00 Mar. 18, 2010 Page 425 of 982
Section 11 16-Bit Timer Pulse Unit (TPU)
REJ09B0054-0600