HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 351

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 9 Data Transfer Controller (DTC)
Source flag cleared
Clear
controller
Clear
DTCER
Clear request
Select
On-chip
DTC
peripheral
module
IRQ interrupt
Interrupt
request
CPU
Interrupt controller
DTVECR
Interrupt mask
Figure 9.2 Block Diagram of DTC Activation Source Control
9.4
Location of Register Information and DTC Vector Table
Locate the register information in the on-chip RAM (addresses: H'FFEBC0 to H'FFEFBF).
Register information should be located at an address that is a multiple of four within the range.
Locating the register information in address space is shown in figure 9.3. Locate the MRA, SAR,
MRB, DAR, CRA, and CRB registers, in that order, from the start address of the register
information.
In the case of chain transfer, register information should be located in consecutive areas as shown
in figure 9.3, and the register information start address should be located at the vector address
corresponding to the interrupt source. Figure 9.4 shows the correspondence between DTC vector
address and register information. The DTC reads the start address of the register information from
the vector address set for each activation source, and then reads the register information from that
start address.
When the DTC is activated by software, the vector address is obtained from: H'0400 +
(DTVECR[6:0] × 2). For example, if DTVECR is H'10, the vector address is H'0420.
The configuration of the vector address is the same in both normal* and advanced modes, a 2-byte
unit being used in both cases. These two bytes specify the lower bits of the register information
start address.
Note: * Normal mode cannot be used in this LSI.
Rev. 6.00 Mar. 18, 2010 Page 289 of 982
REJ09B0054-0600