HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 34

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

14.5 Interrupt Sources............................................................................................................... 540
14.6 Usage Notes ...................................................................................................................... 541
Section 15 Serial Communication Interface (SCI) ............................................547
15.1 Features............................................................................................................................. 547
15.2 Input/Output Pins .............................................................................................................. 551
15.3 Register Descriptions ........................................................................................................ 551
15.4 Operation in Asynchronous Mode .................................................................................... 585
15.5 Multiprocessor Communication Function......................................................................... 596
Rev. 6.00 Mar. 18, 2010 Page xxxii of lx
REJ09B0054-0600
14.4.2 Slave Receive Operation...................................................................................... 529
14.4.3 Master Reception ................................................................................................. 533
14.4.4 Slave Transmission .............................................................................................. 536
14.6.1 Setting Module Stop Mode .................................................................................. 541
14.6.2 TxRDY Flag and Underrun Error ........................................................................ 541
14.6.3 RxRDY Flag and Overrun Error.......................................................................... 542
14.6.4 Error Flag s in the IETEF..................................................................................... 542
14.6.5 Error Flags in IEREF ........................................................................................... 543
14.6.6 Notes on Slave Transmission............................................................................... 544
14.6.7 Notes on DTC Specification ................................................................................ 545
14.6.8 Error Handling in Transmission........................................................................... 545
14.6.9 Power-Down Mode Operation ............................................................................. 546
14.6.10 Notes on Middle-Speed Mode ............................................................................. 546
14.6.11 Notes on Register Access..................................................................................... 546
15.3.1 Receive Shift Register (RSR) .............................................................................. 552
15.3.2 Receive Data Register (RDR) .............................................................................. 552
15.3.3 Transmit Data Register (TDR)............................................................................. 552
15.3.4 Transmit Shift Register (TSR) ............................................................................. 553
15.3.5 Serial Mode Register (SMR) ............................................................................... 553
15.3.6 Serial Control Register (SCR).............................................................................. 557
15.3.7 Serial Status Register (SSR) ................................................................................ 563
15.3.8 Smart Card Mode Register (SCMR) .................................................................... 570
15.3.9 Bit Rate Register (BRR) ...................................................................................... 571
15.3.10 Serial Expansion Mode Register (SEMR_0) ....................................................... 581
15.4.1 Data Transfer Format........................................................................................... 585
15.4.2 Receive Data Sampling Timing and Reception Margin in Asynchronous Mode 587
15.4.3 Clock.................................................................................................................... 588
15.4.4 SCI Initialization (Asynchronous Mode) ............................................................. 589
15.4.5 Serial Data Transmission (Asynchronous Mode) ................................................ 590
15.4.6 Serial Data Reception (Asynchronous Mode)...................................................... 592
15.5.1 Multiprocessor Serial Data Transmission ............................................................ 597