HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 852

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 24 Power-Down Modes
• MSTPCRC
Notes: 1. Bits MSTPA3, MSTPA2, MSTPB5, MSTPB2 to MSTPB0, MSTPC6, MSTPC2 to
24.2
In high-speed mode, when the SCK2 to SCK0 bits in SCKCR are set to 1, the operating mode
changes to medium-speed mode as soon as the current bus cycle ends. In medium-speed mode, the
CPU operates on the operating clock (φ/2, φ/4, φ/8, φ/16, or φ/32) specified by the SCK2 to SCK0
bits. The bus masters other than the CPU (DMAC* and DTC) also operate in medium-speed
mode.
On-chip peripheral modules other than the bus masters always operate on the high-speed clock (φ).
In medium-speed mode, a bus access is executed in the specified number of states with respect to
the bus master operating clock. For example, if φ/4 is selected as the operating clock, on-chip
memory is accessed in 4 states, and internal I/O registers in 8 states.
Medium-speed mode is cleared by clearing all of bits SCK2 to SCK0 to 0. A transition is made to
high-speed mode and medium-speed mode is cleared at the end of the current bus cycle.
If a SLEEP instruction is executed when the SSBY bit in SBYCR is cleared to 0, and LSON bit in
LPWRCR is cleared to 0, a transition is made to sleep mode. When sleep mode is cleared by an
interrupt, medium-speed mode is restored.
Rev. 6.00 Mar. 18, 2010 Page 790 of 982
REJ09B0054-0600
Bit
7
6
5
4
3
2
1
0
Bit Name
MSTPC7
MSTPC6 *
MSTPC5
MSTPC4
MSTPC3
MSTPC2 *
MSTPC1 *
MSTPC0 *
2. Supported only by the H8S/2239 Group.
3. Not available in the H8S/2237 Group and H8S/2227 Group.
4. Not available in the H8S/2227 Group.
5. Supported only by the H8S/2258 Group.
Medium-Speed Mode
MSTPC0 are readable/writable. The initial value of them is 1. The write value should
always be 1.
1
1
1
1
Initial Value
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Target Module
Serial communication interface 3 (SCI_3)
D/A converter *
PC break controller (PBC)
IEBus controller (IEB) *
4
5