HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 863

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

24.12
24.12.1 I/O Port Status
In software standby mode and watch mode, I/O port states are retained. Therefore, there is no
reduction in current dissipation for the output current when a high-level signal is output.
24.12.2 Current Dissipation during Oscillation Settling Wait Period
Current dissipation increases during the oscillation settling wait period.
24.12.3 DTC and DMAC* Module Stop
Depending on the operating status of the DTC and DMAC*, the MSTPA6 bit and MSTPA7 bit
may not be set to 1. Setting of the DTC and DMAC* module stop mode should be carried out only
when the respective module is not activated.
For details, refer to section 8, DMA Controller (DMAC) and section 9, Data Transfer Controller
(DTC).
Note: * Supported only by the H8S/2239 Group.
24.12.4 On-Chip Peripheral Module Interrupt
• Module Stop Mode
• Subactive Mode/Watch Mode
Notes: 1. Supported only by the H8S/2239 Group.
Relevant interrupt operations cannot be performed in module stop mode. Consequently, if
module stop mode is entered when an interrupt has been requested, it will not be possible to
clear the CPU interrupt source or the DMAC *
therefore be disabled before entering module stop mode.
On-chip peripheral modules (DMAC *
mode cannot clear interrupts in subactive mode. Therefore, if subactive mode is entered when
an interrupt is requested, CPU interrupt factors cannot be cleared.
Interrupts should therefore before executing the SLEEP instruction and entering subactive or
watch mode.
2. Not available in the H8S/2237 Group and H8S/2227 Group.
Usage Notes
1
, DTC, TPU, IIC *
1
or DTC activation source. Interrupts should
Rev. 6.00 Mar. 18, 2010 Page 801 of 982
2
) that stop operation in subactive
Section 24 Power-Down Modes
REJ09B0054-0600