HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 805

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

The FLMCR1, FLMCR2, EBR1, and EBR2 settings are retained, however program mode or erase
mode is aborted at the point at which the error occurred. Program mode or erase mode cannot be
re-entered by re-setting the P1 or E1 bit. However, PV1 and EV1 bit setting is enabled, and a
transition can be made to verify mode. Error protection can be cleared only by a reset or in
hardware standby.
20.10
All interrupts, including NMI input, are disabled when flash memory is being programmed or
erased (when the P1 or E1 bit is set in FLMCR1), and while the boot program is executing in boot
mode *
1. Interrupt during programming or erasing might cause a violation of the programming or
2. In the interrupt exception handling sequence during programming or erasing, the vector would
3. If an interrupt occurred during boot program execution, it would not be possible to execute the
Notes: 1. Interrupt requests must be disabled inside and outside the CPU until the programming
20.11
In programmer mode, a PROM programmer can be used to perform programming/erasing via a
socket adapter, just as for a discrete flash memory. Use a PROM programmer which supports the
Renesas Technology 512-kbyte, 256-kbyte, or 128-kbyte flash memory on-chip microcomputer
device type. It requires the 12-MHz input clock.
The socket adapter pin correspondence diagram is shown in figure 20.13.
erasing algorithm, with the result that normal operation could not be assured.
not be read correctly *
normal boot mode sequence.
1
, to give priority to the program or erase operation. There are three reasons for this:
2. The vector may not be read correctly in this case for the following two reasons:
Interrupt Handling When Programming/Erasing Flash Memory
Programmer Mode
control program has completed programming.
• If flash memory is read while being programmed or erased (while the P1 or E1 bit is
• If the interrupt entry in the vector table has not been programmed yet, interrupt
set in FLMCR1), correct read data will not be obtained (undetermined values will be
returned).
exception handling will not be executed correctly.
2
, possibly resulting in CPU runaway.
Section 20 Flash Memory (F-ZTAT Version)
Rev. 6.00 Mar. 18, 2010 Page 743 of 982
REJ09B0054-0600