HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 312

MCU 3V 384K I-TEMP 100-TQFP

HD64F2239TF20I

Manufacturer Part Number
HD64F2239TF20I
Description
MCU 3V 384K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet

Specifications of HD64F2239TF20I

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2239TF20I
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 8 DMA Controller (DMAC)
Figure 8.13 shows an example of the setting procedure for normal mode.
Rev. 6.00 Mar. 18, 2010 Page 250 of 982
REJ09B0054-0600
Set number of transfers
Set transfer source and
Normal mode setting
transfer destination
Read DMABCRL
Set DMABCRH
Set DMABCRL
Normal mode
Set DMACR
Figure 8.13 Example of Normal Mode Setting Procedure
addresses
[1]
[2]
[3]
[4]
[5]
[6]
[1]
[2]
[3]
[4]
[5]
[6]
Set each bit in DMABCRH.
Set the transfer source address in MARA, and
the transfer destination address in MARB.
Set the number of transfers in ETCRA.
Set each bit in DMACRA and DMACRB.
Read DTE = 0 and DTME = 0 in DMABCRL.
Set each bit in DMABCRL.
Set the FAE bit to 1 to select full address
mode.
Specify enabling or disabling of internal
interrupt clearing with the DTA bit.
Set the transfer data size with the DTSZ bit.
Specify whether MARA is to be incremented,
decremented, or fixed, with the SAID and
SAIDE bits.
Clear the BLKE bit to 0 to select normal
mode.
Specify whether MARB is to be incremented,
decremented, or fixed, with the DAID and
DAIDE bits.
Select the activation source with bits DTF3 to
DTF0.
Specify enabling or disabling of transfer end
interrupts with the DTIE bit.
Set both the DTME bit and the DTE bit to 1 to
enable transfer.

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