HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 827

MCU 3V 384K I-TEMP 100-TQFP

HD64F2239TF20I

Manufacturer Part Number
HD64F2239TF20I
Description
MCU 3V 384K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet

Specifications of HD64F2239TF20I

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2239TF20I
Manufacturer:
Renesas Electronics America
Quantity:
10 000
This LSI has an on-chip clock pulse generator that generates the system clock (φ), the bus master
clock, and internal clocks. The clock pulse generator consists of an oscillator, duty adjustment
circuit, clock selection circuit, medium-speed clock divider, bus master clock selection circuit,
subclock oscillator, and wave formation circuit. A block diagram of the clock pulse generator is
shown in figure 23.1.
Frequency changes are performed by software by settings in the low-power control register
(LPWRCR) and system clock control register (SCKCR).
EXTAL
XTAL
OSC1
OSC2
Legend:
LPWRCR:
SCKCR:
Low-power control register
System clock control register
Subclock
oscillator
oscillator
System
clock
Figure 23.1 Block Diagram of Clock Pulse Generator
Section 23 Clock Pulse Generator
Generation
adjustment
Waveform
LPWRCR
Circuit
circuit
Duty
WDT_1 count clock
RFCUT
φSUB
Note: * Supported only by the H8S/2239 Group.
selection
circuit
Clock
System clock φ pin
Rev. 6.00 Mar. 18, 2010 Page 765 of 982
clock divider
Medium-
speed
peripheral modules
Section 23 Clock Pulse Generator
Internal clock to
φ
φ/2 to
φ/32
selection
SCKCR
REJ09B0054-0600
master
circuit
clock
Bus
Bus master clock
to CPU and DTC
SCK2 to SCK0
and DMAC *

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