HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 718

MCU 3V 384K I-TEMP 100-TQFP

HD64F2239TF20I

Manufacturer Part Number
HD64F2239TF20I
Description
MCU 3V 384K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet

Specifications of HD64F2239TF20I

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2239TF20I
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 16 I
Figure 16.7 is a flowchart showing an example of the master transmit mode.
Rev. 6.00 Mar. 18, 2010 Page 656 of 982
REJ09B0054-0600
2
C Bus Interface (IIC) (Option)
Figure 16.7 Flowchart for Master Transmit Mode (Example)
No
No
No
No
No
Write transmit data to ICDR
Write transmit data to ICDR
Read BBSY flag in ICCR
Read ACKB bit in ICSR
Read IRIC flag in ICCR
Clear IRIC flag in ICCR
Read IRIC flag in ICCR
Read ACKB bit in ICSR
Clear IRIC flag in ICCR
Read IRIC flag in ICCR
Clear IRIC flag in ICCR
and TRS = 1 (ICCR)
and SCP = 0 (ICCR)
Write ACKE = 0 (ICCR)
Write BBSY = 0 and
Transmit complete?
Transmit mode?
Write BBSY = 1
(Clear ACKB = 0)
SCP = 0 (ICCR)
Initial settings
Set MST = 1
(ACKB = 1?)
ACKB = 0?
BBSY = 0?
IRIC = 1?
IRIC = 1?
IRIC = 1?
Yes
Start
End
Yes
Yes
Yes
Yes
Yes
Yes
No
No
[1] Initial settings.
[2] Determine status of SCL and SDA lines.
[3] Set to master transmit mode.
[4] Generate start condition.
[5] Wait for start condition to be met.
[6] Set 1st byte (slave address + R/W) transmit data.
[7] Wait for end of 1 byte transmission.
[8] Judge acknowledge signal from specified.
[9] Set transmit data for 2nd byte onward.
[10] Wait for end of 1 byte transmission.
[11] Judge end of transmission.
[12] Generate stop condition.
Master receive mode
(Perform ICDR write and IRIC flag clear
operations continuously.)
slave device.
(Perform ICDR write and IRIC flag clear
operations continuously.)

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