HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 455

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

11.3.5
The TSR registers indicate the status of each channel. The TPU of the H8S/2227 Group has a total
of three TSR registers, one each for channels 0 to 2. In other groups, the TPU has a total of six
TSR registers, one each for channels 0 to 5.
Bit
7
6
5
4
Bit Name
TCFD
—
TCFU
TCFV
Timer Status Register (TSR)
Initial value
1
1
0
0
R/W
R
—
R/(W) *
R/(W) *
1
1
Description
Count Direction Flag
Status flag that shows the direction in which TCNT
counts in channels 1, 2, 4 *
In channels 0 and 3 *
read as 1 and cannot be modified.
0: TCNT counts down
1: TCNT counts up
Reserved
This bit is always read as 1 and cannot be
modified.
Underflow Flag
Status flag that indicates that TCNT underflow has
occurred when channels 1, 2, 4 *
to phase counting mode.
In channels 0 and 3 *
read as 0 and cannot be modified.
[Setting condition]
When the TCNT value underflows (changes from
H'0000 to H'FFFF)
[Clearing condition]
When 0 is written to TCFU after reading TCFU = 1
Overflow Flag
Status flag that indicates that TCNT overflow has
occurred.
[Setting condition]
When the TCNT value overflows (changes from
H'FFFF to H'0000)
[Clearing condition]
When 0 is written to TCFV after reading TCFV = 1
Rev. 6.00 Mar. 18, 2010 Page 393 of 982
Section 11 16-Bit Timer Pulse Unit (TPU)
3
3
, bit 7 is reserved. It is always
, bit 5 is reserved. It is always
3
, and 5 *
3
REJ09B0054-0600
, and 5 *
3
.
3
are set