HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 673
HD64F2239TF20I
Manufacturer Part Number
HD64F2239TF20I
Description
MCU 3V 384K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet
1.DF2238RFA6V.pdf
(1048 pages)
Specifications of HD64F2239TF20I
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F2239TF20I
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Data transfer with other types of IC cards (direct convention and inverse convention) are
performed as described in the following.
With the direction convention type IC and the above sample start character, the logic 1 level
corresponds to state Z and the logic 0 level to state A, and transfer is performed in LSB-first order.
The start character data above is H'3B. For the direct convention type, clear the SDIR and SINV
bits in SCMR to 0. According to Smart Card regulations, clear the O/E bit in SMR to 0 to select
even parity mode.
With the inverse convention type, the logic 1 level corresponds to state A and the logic 0 level to
state Z, and transfer is performed in MSB-first order. The start character data for the above is
H'3F. For the inverse convention type, set the SDIR and SINV bits in SCMR to 1. According to
Smart Card regulations, even parity mode is the logic 0 level of the parity bit, and corresponds to
When there is no parity error
When a parity error occurs
Legend:
Ds:
D7 to D0:
Dp:
DE:
Figure 15.27 Inverse Convention (SDIR = SINV = O/E = 1)
Figure 15.26 Direct Convention (SDIR = SINV = O/E = 0)
Figure 15.25 Normal Smart Card Interface Data Format
(Z)
(Z)
Ds
Ds
Start bit
Data bits
Parity bit
Error signal
Ds
Ds
A
A
D0
D0
D7
D0
Z
Z
D1
D1
D6
D1
Z
Z
Transmitting station output
Transmitting station output
D2
D2
D5
D2
A
A
D4
D3
A
Z
D3
D3
D3
D4
A
Z
D4
D4
Section 15 Serial Communication Interface (SCI)
D2
D5
A
Z
D5
D5
D1
D6
A
A
Rev. 6.00 Mar. 18, 2010 Page 611 of 982
D6
D6
D0
D7
A
A
Dp
Dp
Z
Z
D7
D7
Dp
Dp
(Z)
(Z)
Receiving station
output
State
State
DE
REJ09B0054-0600
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