HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 665

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

15.6.3
Figure 15.19 shows an example of SCI operation for transmission in clocked synchronous mode.
In serial transmission, the SCI operates as described below.
1. The SCI monitors the TDRE flag in SSR, and if the flag is 0, the SCI recognizes that data has
2. After transferring data from TDR to TSR, the SCI sets the TDRE flag to 1 and starts
been written to TDR, and transfers the data from TDR to TSR.
transmission. If the TIE bit in SCR is set to 1 at this time, a transmit data empty interrupt
(TXI) is generated. Continuous transmission is possible because the TXI interrupt routine
writes the next transmit data to TDR before transmission of the current transmit data has been
completed.
Note: In simultaneous transmit and receive operations, the TE and RE bits should both be cleared
Serial Data Transmission (Clocked Synchronous Mode)
Set TE and RE bits in SCR to 1, and
set RIE, TIE, TEIE, and MPIE bits
Clear TE and RE bits in SCR to 0
Set CKE1 and CKE0 bits in SCR
to 0 or set to 1 simultaneously.
Set data transfer format in
1-bit interval elapsed?
Start initialization
Set value in BRR
SMR and SCMR
<Transfer start>
(TE, RE bits 0)
Figure 15.18 Sample SCI Initialization Flowchart
Yes
Wait
No
[4]
[2]
[3]
[1]
Section 15 Serial Communication Interface (SCI)
[1] Set the clock selection in SCR. Be sure
[2] Set the data transfer format in SMR and
[3] Write a value corresponding to the bit
[4] Wait at least one bit interval, then set
Rev. 6.00 Mar. 18, 2010 Page 603 of 982
to clear bits RIE, TIE, TEIE, and MPIE,
TE and RE, to 0.
SCMR.
rate to BRR. Not necessary if an
external clock is used.
the TE bit or RE bit in SCR to 1.
Also set the RIE, TIE TEIE, and MPIE
bits.
Setting the TE and RE bits enables the
TxD and RxD pins to be used.
REJ09B0054-0600