HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 429

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

11.3.1
The TCR registers control the TCNT operation for each channel. The TPU of the H8S/2227 Group
has a total of three TCR registers, one each for channels 0 to 2. In other groups, the TPU has a
total of six TCR registers, one each for channels 0 to 5. TCR register settings should be made only
when TCNT operation is stopped.
Note:
Bit
7
6
5
4
3
2
1
0
* Not available in the H8S/2227 Group.
Bit Name
CCLR2
CCLR1
CCLR0
CKEG1
CKEG0
TPSC2
TPSC1
TPSC0
Timer Control Register (TCR)
Initial Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Counter Clear 2 to 0
These bits select the TCNT counter clearing source.
See tables 11.3 and 11.4 for details.
Clock Edge 1 and 0
These bits select the input clock edge. When the
input clock is counted using both edges, the input
clock period is halved (e.g. φ/4 both edges = φ/2
rising edge). If phase counting mode is used on
channels 1, 2, 4 * , and 5 * , this setting is ignored and
the phase counting mode setting has priority. Internal
clock edge selection is valid when the input clock is
φ/4 or slower. When the input clock is φ/1 or when
overflow/underflow of another channel is selected,
this setting is ignored and the input clock is counted
at the falling edge of φ.
00: Count at rising edge
01: Count at falling edge
1×: Count at both edges
Legend: ×: Don’t care
Time Prescaler 2 to 0
These bits select the TCNT counter clock. The clock
source can be selected independently for each
channel. See tables 11.5 to 11.10 for details.
Description
Rev. 6.00 Mar. 18, 2010 Page 367 of 982
Section 11 16-Bit Timer Pulse Unit (TPU)
REJ09B0054-0600