HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 733

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

6. Clear the IRIC flag to 0.
7. To end transmission, clear the ACKE bit in ICCR to 0, to clear the acknowledge bit stored in
8. Clear the TRS bit to 0 for the next address reception, to set slave receive mode.
9. Dummy-read ICDR to release SCL on the slave side.
10. When the stop condition is detected, that is, when SDA is changed from low to high when SCL
User processing
(master output)
(master output)
(slave output)
(slave output)
the ACKB bit to 0.
is high, the BBSY flag in ICCR is cleared to 0 and the STOP flag in ICSR is set to 1. At the
same time, the IRIC flag is set to 1. If the IRIC flag has been set, it is cleared to 0.
To restart slave transmit mode operation, make the initial settings once again.
ICDRT
TDRE
ICDRS
SDA
SDA
IRIC
SCL
SCL
Figure 16.18 Example of Slave Transmit Mode Operation Timing (MLS = 0)
Slave receive mode
R/W
[3] IRIC clearance
8
9
A
[2]
Slave transmit mode
[3] ICDR write
Bit 7
1
Bit 6
2
[3] IRIC clearance
Bit 5
3
Data 1
Bit 4
4
Data 1
Data 1
Bit 3
5
Section 16 I
Rev. 6.00 Mar. 18, 2010 Page 671 of 982
Bit 2
6
Bit 1
7
2
Bit 0
C Bus Interface (IIC) (Option)
8
9
[4]
A
[5] ICDR write
REJ09B0054-0600
[5] IRIC clearance
Data 2
Data 2
Bit 7
1
Data 2
Bit 6
2