HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 643

MCU 3V 384K I-TEMP 100-TQFP

HD64F2239TF20I

Manufacturer Part Number
HD64F2239TF20I
Description
MCU 3V 384K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet

Specifications of HD64F2239TF20I

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2239TF20I
Manufacturer:
Renesas Electronics America
Quantity:
10 000
15.3.10 Serial Expansion Mode Register (SEMR_0)
SEMR_0 is an 8-bit register that expands SCI_0 functions; such as setting of the base clock,
selecting of the clock source, and automatic setting of the transfer rate.
Note: Supported only by the H8S/2239 Group only.
Bit
7
6 to 4
3
Bit Name
SSE
ABCS
Initial
Value
0
Undefined
0
R/W
R/W
R/W
Description
SCI_0 Select Enable
This bit enables or disables the SCI_0 select
function when an external clock is input in clocked
synchronous mode. When 1 is set to the
PG1/IRQ7 pin, while the SCI_0 select function is
enabled, the TxD0 output becomes Hi-Z and the
SCK0 input in this LSI is fixed high making the
SCI_0 data transfer terminated. The SSE setting is
valid when the external clock input is selected
(CKE in SCR = 0) in clocked synchronous mode
(C/A in SMR = 1).
0: SCI_0 select is disabled.
1: SCI_0 select is enabled.
When then PG1/IRQ7 pin = 1, the TxD0 output
becomes Hi-Z and the SCK0 clock input is fixed
high.
Reserved
These bits are always read as 0, and cannot be
modified.
Asynchronous Base Clock Select
Selects the 1-bit-interval base clock in
asynchronous mode.
The ABCS setting is valid in asynchronous mode
(C/A in SMR = 0).
0: Operates on a base clock with a frequency of 16
1: Operates on a base clock with a frequency of 8
Section 15 Serial Communication Interface (SCI)
times the transfer rate.
times the transfer rate.
Rev. 6.00 Mar. 18, 2010 Page 581 of 982
REJ09B0054-0600

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