HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 58

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Table 15.10 Serial Transfer Formats (Asynchronous Mode) ..................................................... 586
Table 15.11 SSR Status Flags and Receive Data Handling........................................................ 593
Table 15.12 Interrupt Sources of Serial Communication Interface Mode.................................. 623
Table 15.13 Interrupt Sources in Smart Card Interface Mode.................................................... 624
Section 16 I
Table 16.1
Table 16.2
Table 16.3
Table 16.4
Table 16.5
Table 16.6
Table 16.7
Table 16.8
Table 16.9
Section 17 A/D Converter
Table 17.1
Table 17.2
Table 17.3
Table 17.4
Table 17.5
Table 17.6
Section 18 D/A Converter
Table 18.1
Table 18.2
Section 20 Flash Memory (F-ZTAT Version)
Table 20.1
Table 20.2
Table 20.3
Table 20.4
Table 20.5
Table 20.6
Table 20.7
Section 22 PROM
Table 22.1
Rev. 6.00 Mar. 18, 2010 Page lvi of lx
REJ09B0054-0600
Pin Configuration ................................................................................................... 636
Transfer Format...................................................................................................... 640
I
Flags and Transfer States ....................................................................................... 648
Flags and Transfer States ....................................................................................... 673
IIC Interrupt Source ............................................................................................... 676
I
Permissible SCL Rise Time (t
I
Pin Configuration ................................................................................................... 691
Analog Input Channels and Corresponding ADDR Registers................................ 692
A/D Conversion Time (Single Mode) .................................................................... 700
A/D Conversion Time (Scan Mode)....................................................................... 700
A/D Converter Interrupt Source ............................................................................. 701
Analog Pin Specifications ...................................................................................... 706
Pin Configuration ................................................................................................... 708
D/A Conversion Control ........................................................................................ 709
Differences between Boot Mode and User Program Mode.................................... 717
Pin Configuration ................................................................................................... 724
Setting On-Board Programming Modes................................................................. 732
Boot Mode Operation............................................................................................. 734
System Clock Frequencies for Which Automatic Adjustment of LSI Bit Rate
Is Possible............................................................................................................... 734
Flash Memory Operating States ............................................................................. 745
Registers Present in F-ZTAT Version but Absent in Masked ROM Version ........ 751
Selecting PROM Mode .......................................................................................... 755
2
2
2
2
C Bus Interface (IIC) (Option)
C Transfer Rate .................................................................................................... 642
C Bus Timing (SCL and SDA Output) ................................................................ 677
C Bus Timing (with Maximum Influence of t
sr
) Values ................................................................. 678
Sr
/t
Sf
) .............................................. 679